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kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 1 tel:886-3-5236508 fax: 886-3-5613221 khtek DA1196H 24bit, 192khz 6-channel digital to audio converter general description DA1196H is the cost-down version of khtek da1196, a digital to analog converter especially designed to work with mpeg2/ac-3 decoded data for applications such as, dvd player, home theater, set-top box, and digital tv, etc. the DA1196H integrates 6 da channels and is pin compatible with the da1196. the DA1196H provides customers several selectable functions via hardware control pins. features high resolution: 16/18/20/24/32 bit selectable high performance: sampling rate: 8khz ~ 192khz thd+n: -95 db dynamic range: 103db s/n ratio: 103db channel separation: 105db 28 pin ssop package high integration: 6 audio channels, each contains: over-sampling digital filter high-resolution delta sigma dac analog low pass filter output amplifier high versatility control via hardware pins right-justified or iis format selectable bi-directional mute control pin de-emphasis for 44.1khz sampling rate pin configuration vdd vcc1 scki voutr1 bckin agnd srcin voutl1 din1 agnd1 din2 voutr2 din3 agnd nc voutl2 mutec agnd2 nc voutr3 dgnd agnd i 2 s voutl3 iwl cap dem vcc2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 2 pin assignments pin name i/o description 1 vdd pwr digital power supply 2 scki in external master/system clock input 3 bckin in bit clock input for audio data 4 srcin in sample rate clock input 5 din1 in audio data input to dac1 6 din2 in audio data input to dac2 7 din3 in audio data input to dac3 8 nc in not connected (don?t care) in mute control, active ?high?. to mute, pull this pin ?high?. 9 mutec out output pin to control external mute circuit. 10 nc not connected (don?t care) 11 dgnd gnd digital ground 12 i 2 s in audio input format selection 13 iwl in input word length selection 14 dem in de-emphasis control. set this pin ?high? to enable de-emphasis function. 15 vcc2 pwr analog power 16 cap - analog common mode pin 17 voutl3 out l-channel output from dac3 18 agnd gnd analog ground 19 voutr3 out r-channel output from dac3 20 agnd2 gnd analog ground 21 voutl2 out l-channel output from dac2 22 agnd gnd analog ground 23 voutr2 out r-channel output from dac2 24 agnd1 gnd analog ground 25 voutl1 out l-channel output from dac1 26 agnd gnd analog ground 27 voutr1 out r-channel output from dac1 28 vcc1 pwr analog power note: 1. all digital input pins have schmitt triggers and internal pull-up resistors except the mute pin, which have internal pull-down resistors. 2. logic high is denoted as either ?h? or ?1?; logic low is denoted as either ?l? or ?0? in this document. absolute maximum rating power supply voltage + 6.5v +vcc to vdd difference +/- 0.1v input logic voltage -0.3v to (vdd + 0.3v) power dissipation 600mw operating temperature range -25 c to +85 c storage temperature -55 c to +125 c ordering and package information model package package drawing no. DA1196H 28 pin ssop 128 -ss package drawing is at the end of this data sheet esd sensitive device although da1 196h is furnished with khtek?s proprietary esd protection circuitry, proper esd precaution is still recommended to avoid performance degradation or p ermanent dama g e.
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 3 specifications electrical characteristics: vcc1=vcc2=vdd=5v/3.3v, @ 25 o c, fs=48khz, 24bit input data, system clock = 384/256fs. parameter conditions min type max unit sampling frequency 16 96 192 khz system clock frequency 128fs 192fs 256fs 384fs 512fs 768fs 1.024 1.536 2.048 3.072 4.096 6.144 6.144 9.216 12.288 18.432 24.576 36.864 24.5760 36.8640 49.1520 73.7280 mhz mhz mhz mhz mhz mhz audio data format selectable right justified i 2 s data bit length right justified i 2 s 16 16 24 24 24 32 bits bits digital input/output input logic level v ih v il output logic level v oh v ol vcc1=vcc2=vdd pin 2,3,4,5,6,7,9,12,13,14 ---schmitt trigger vcc1=vcc2=vdd 5 2 % 90% 16% 10% vdd vdd vdd vdd dc accuracy gain error gain mismatch ch to ch +/- 1 +/- 1 +/- 3 +/- 2 %fsr %fsr
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 4 electrical characteristics ( cont. ): vcc1=vcc2=vdd=5v, @25 o c, 24bit input data, system clock = 384/256fs. parameter conditions min type max unit power supply voltage range: vcc1, vcc2, vdd supply current: icc1+icc2+idd power dissipation: supply current: icc1+icc2+idd power dissipation: vcc1=vcc2=vdd @fs=44.1khz vcc1=vcc2=vdd=5v @fs=96khz vcc1=vcc2=vdd=5v 4.5 5 43 215 47 235 5.5 v ma mw ma mw analog output voltage range center voltage load impedance frequency response vout=0db ac load 10 0 0.96 2.5 20 vrms v kohm khz dynamic performance thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=48khz fout=1khz eiaj, a-weighted 99 99 103 -95 -41 103 103 105 -97 -43 105 105 108 db db db db db thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=96khz fout=1khz eiaj, a-weighted 97 97 101 -95 -40 102 102 103 -97 -42 104 104 106 db db db db db thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=192khz fout=1khz eiaj, a-weighted 97 97 98 -94 -39 101 101 100 -97 -40 102 102 103 db db db db db
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 5 electrical characteristics ( cont. ): vcc1=vcc2=vdd=3.3v, @25 o c, 24bit input data, system clock = 384/256fs. parameter conditions min type max unit power supply voltage range: vcc1, vcc2, vdd supply current: icc1+icc2+idd power dissipation: supply current: icc1+icc2+idd power dissipation: vcc1=vcc2=vdd @fs=44.1khz vcc1=vcc2=vdd=3.3v @fs=96khz vcc1=vcc2=vdd=3.3v 3 3.3 27 89 30 99 3.6 v ma mw ma mw analog output voltage range center voltage load impedance frequency response vout=0db ac load 10 0 0.635 1.65 20 vrms v kohm khz dynamic performance thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=48khz fout=1khz eiaj, a-weighted 99 99 104 -94 -39 101 101 104 -97 -42 105 105 109 db db db db db thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=96khz fout=1khz eiaj, a-weighted 97 97 102 -94 -38 100 100 102 -97 -41 104 104 107 db db db db db thd+n at fs(0db) thd+n at ?60db dynamic range snr channel separation @fs=192khz fout=1khz eiaj, a-weighted 97 97 99 -93 -36 98 98 99 -97 -39 102 102 104 db db db db db
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 6 timing characteristics: scki/master clock input timing: timing parameter @25 o c, fs=48khz, 24bit input data, system clock = 384/256fs parameter symbol value unit master clock timing scki clock high level sckih >10 ns scki clock low level sckil >10 ns timing diagram sckih tscki = 1/256fs or 1/384fs 40%vdd 16%vdd sckil data input timing: timing parameter: @25 o c, fs=48khz, 24bit input data, system clock = 384/256fs parameter symbol value unit data input timing din setup time tds >30 ns din hold time tdh >30 ns bckin high-level, low-level tbcwh, tbcwl >50 ns bckin pulse cycle time tbcy >100 ns bckin rising edge to srcin tbsr >30 ns srcin to bckin rising edge tsrb >30 ns timing diagram tsr b t b c y t b cw h t b cw l srcin t b s r tds tdh din1/2/3 bckin
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 7 lpf lpf lpf lpf lpf lpf functional description functional block diagram vcc1 agnd1 scki vdd vcc2 dgnd agnd2 srcin bckin din1 din2 din3 mute i 2 s iwl dem system clock the system clock must be 128fs, 192fs, 256fs, 384fs, 512fs, or 768fs, where fs is the standard audio frequency including 32khz, 44.1khz, 48khz, 96khz, or 192khz. the system clock can be input via scki (pin2) from an external clock and is used to operate the digital filter and delta sigma modulator. the system clock should be synchronized with srcin (pin4) ? sampling rate clock. if the phase difference between them becomes greater than 6 bit bckin (pin3), the synchronization will be automatically performed and at this time the analog outputs are forced to vcc/2 by the chip. table-1 system clock and sampling rate system clock frequency (mhz) sampling rate fs 128 fs 192 fs 256 fs 384 fs 512 fs 768 fs 32khz 4.0960 6.1440 8.1920 12.2880 16.3840 24.5760 44.1khz 5.6448 8.4670 11.2896 16.9340 22.5792 33.8688 48khz 6.1440 9.2160 12.2880 18.4320 24.5760 36.8640 96khz 12.2880 18.4320 24.5760 36.8640 49.1520 73.7280 192khz 24.5760 36.8640 49.1520 73.7280 - - voutr3 voutl3 voutr2 voutl2 voutr1 voutl1 cap power supply clock generator dac1 l dac1 r dac2 l dac2 r dac3 l dac3 r digital filters reset serial audio data interface serial control interface
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 8 serial digital audio data input interface the digital audio information is applied to DA1196H via din1/2/3 (pin 5, 6, 7) for audio data input, via srcin (pin 4) for sampling rate clock, and via bckin (pin 3) for bit clock. the DA1196H supports right justified/normal data format and i 2 s data format. all data formats are msb first and two?s complement. the i 2 s format supports word length from 16 bit to 32 bit, but the right justified format supports word length only up to 24 bit. the i 2 s data format, which is compatible with philips serial data protocol, is left justified and one bit clock delay between srcin and data msb. the relationship of the three audio input signals, din, srcin, and bckin is illustrated in the following figures for three formats: lch = "1" rch = "0" srcin bckin din1/2/3 right justified/normal format 1/fs 1 2 3 n -2 n -1 n 1 2 3 n -2 n -1 n msb msb lsb lsb lch = "0" rch = "1" srcin bckin din1/2/3 i 2 s format 1/fs msb msb lsb lsb 1 2 3 n -2 n -1 n 1 2 3 n -2 n -1 n 1 bckin 1 bckin note: 1. logic high is denoted as either ?h? or ?1?; logic low is denoted as either ?l? or ?0? in this document. 2. with iis format, the word length can go up to 32 bit as long as the srcin period can accommodate. multi-functions & controls the logic levels set on the hardware pins ? mutec (pin 9), i 2 s (pin 12), iwl (pin 13), and dem (pin 14) control a few functions implemented in the DA1196H. audio data format selection i 2 s (pin12) and iwl (pin13) together can be used to obtain different input data format and word length. the proper settings are shown in the following table:
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 9 table-2 selectable input data formats and word length input data format i 2 s (pin12) iwl (pin13) normal format -16bit 0 0 normal format -20bit 0 1 normal format -24bit 1 0 i 2 s 1 1 soft mute function and control soft mute function is implemented for all dac channels in DA1196H. it takes 256/fs seconds for dac to soft mute its output; therefore the time needed to soft mute the dac depends on the sampling rate used. a bi-directional mutec (pin 9) controls this function. when mutec (pin 9) is used as a control input pin, a logic ?0? on mutec pin (pin 9) allows for a normal operation; while a logic ?1? on mute pin (pin9) would force the outputs to be soft muted. table-3 selectable mute function mute (pin 9) mute function 0 off 1 on the mute control pin mutec (pin 9) can be used as an output pin to control the external mute circuit to suppress the clicks and pops that often occur during power up stage; the irritating noises when clocks are not correct as specified; or the unpleasant dc tone when the input data on both channels is zeros or ones for more than 8192 consecutive cycles of srcin. the mutec pin (pin 16) goes high when any of the situations described above occurs to activate the external mute circuit. it will go back to low when power and clocks are stabilized or a non-zero input data occurs on either channel. the use of the external mute circuit is not mandatory for special cares having been taken within the DA1196H to minimize the problems described above. however it is recommended for designs requiring extreme quietness in above situations. de-emphasis function and control the de-emphasis function is controlled by the dem (pin14) in hardware mode. a logic ?0? on dem pin (pin 14) allows for a normal operation; while a logic ?1? on dem pin (pin 14) would enable the de-emphasis function. table-5 de-emphasis function dem (pin14) de-emphasis 0 off 1 on 0 5 10 15 20 25 ?10 ?9 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 0 de?emphasis frequency response(fs=44.1khz) frequency(khz) level(db)
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 10 application considerations application circuit vdd vcc1 scki voutr1 bckin agnd srcin voutl1 din1 agnd1 din2 voutr2 din3 agnd nc voutl2 mutec agnd2 nc voutr3 dgnd agnd i 2 s voutl3 iwl cap dem vcc2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 680pf 1500pf 100pf 10k 10k 10k 680pf 1500pf 100pf 10k 10k 10k speakers 10uf 10uf +3.3v for DA1196H3 +5v for DA1196H5 1uf 0.1uf 0.1uf 1uf to lpf as shown for voutl3 and voutr3 audio format selection de-emphasis control bi-directional mute control 1uf 0.1uf 1uf 0.1uf 10uf 10uf 10uf 10uf DA1196H DA1196H power supply connections the power and grounding should be carefully arranged to achieve the highest performance possible. the power pins should be connected together before being connected to a clean supply and all the ground pins should be connected to the analog ground plane at locations near by the physical pins. power and reference decoupling all switching signals, especially clocks, should be kept away from cap (pin 16) to avoid unwanted coupling. the decoupling capacitors for cap and power should be located on the same layer as the device and as close to the device as possible with the smaller capacitor, 0.1uf, being the closest. output filtering the internal low pass filter has 3db bandwidth at 100khz. to limit out of band noise, an external 3 rd order filter as shown in the application circuit diagram is recommended, especially when the chip is to drive a wide band amplifier.
kash technology inc. preliminary specifications oct., 2003 khtek DA1196H 11 package drawing no. 128-ss model package package drawing no. DA1196H 28 pin ssop 128-ss package outline drawing is shown as below: e 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 a2 a e b a 1 c l symbols dimensions in millimeters dimensions in inches min nom max min nom max a ----- ----- 2.00 ----- ----- 0. 079 a1 0.05 ---- ----- 0. 002 ---- ----- a2 ---- 1.75 ---- ---- 0. 069 ---- b 0.22 0.30 0.38 0.0086 0.012 0.015 c 0.13 0.15 0.20 0.0051 0.006 0.0079 d 10.08 10.20 10.34 0.397 0.402 0.407 e 7.40 7.80 8.20 0.291 0.307 0.323 e1 5.00 5.30 5.60 0.197 0.209 0.220 e ---- 0.65 ---- ---- 0. 0256 ---- l 0.56 0.75 0.97 0.022 0.030 0.037 ----- 4 o 8 o ---- 4 o 8 o e1 d

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